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• Registers – Registers are in the CPU and are referred to by specific names – Data registers • Hold data for an operation to be performed • There are 4 data registers (AX, BX, CX, DX) – Address registers • Hold the address of an instruction or data element • Segment registers (CS, DS, ES, SS) • Pointer registers (SP, BP, IP) • Index registers (SI, DI) – Status register • Keeps the current status of the processor • On an IBM PC the status register is called the FLAGS register – In total there are fourteen 16-bit registers in an 8086/8088 Data Registers: AX, BX, CX, DX • Instructions execute faster if the data is in a register • AX, BX, CX, DX are the data registers • Low and High bytes of the data registers can be accessed separately – AH, BH, CH, DH are the high bytes – AL, BL, CL, and DL are the low bytes • Data Registers are general purpose registers but they also perform special functions • AX – Accumulator Register – Preferred register to use in arithmetic, logic and data transf

8086 Architecture • The 8086 has two parts, the Bus Interface Unit (BIU) and the Execution Unit (EU). • The BIU fetches instructions, reads and writes data, and computes the 20-bit address. • The EU decodes and executes the instructions using the 16-bit ALU. • The BIU contains the following registers: IP - the Instruction Pointer CS - the Code Segment Register DS - the Data Segment Register SS - the Stack Segment Register ES - the Extra Segment Register The BIU fetches instructions using the CS and IP, written CS:IP, to contr a ct the 20-bit address. Data is fetched using a segment register (usually the DS) and an effective address (EA) computed by the EU depending on the addressing mode. The EU contains the following 16-bit registers: AX - the Accumulator BX - the Base Register CX - the Count Register DX - the Data Register SP - the Stack Pointer

Slide 2 Slide 2 8086 Features: • 16-bit Arithmetic Logic Unit • 20-bit address bus - 220 = 1,048,576 = 1 meg The address refers to a byte in memory. In the 8088, these bytes come in on the 8-bit data bus. In the 8086, bytes at even addresses come in on the low half of the data bus (bits 0-7) and bytes at odd addresses come in on the upper half of the data bus (bits 8-15). The 8086 can read a 16-bit word at an even address in one operation and at an odd address in two operations. The 8088 needs two operations in either case. The least significant byte of a word on an 8086 family microprocessor is at the lower address. Slide 3 Simplified CPU Design: